Wafer bonding

For cost-effective implementation of multifunctional components and packaging solutions of sensor and other system components, wafer-scale procedures are required. CiS has access to modern systems engineering comprising bond aligners and flexible substrate bonders for the following wafer-level bond processes:

  • Silicon direct bonding (SDB): high temperature and low temperature processes
  • Anodic wafer bonding (AWB)
  • Eutectic wafer bonding (EWB)
  • Glass frit bonding
  • Thermocompression bonding
  • Adhesive bonding

With these processes technological modules to implement multiple stacks based on the combination of different wafer materials and several bonding processes have been applied.
In process development chemical-mechanical polishing (CMP) is available to condition surfaces for anodic bonding and SDB. For surface conditioning of bonded surfaces a broad spectrum of wet and plasma-chemical activation processes have been developed and tested.