Platform for SiCer compatible Si sensor technology
| German title: | Plattform für eine SiCer kompatible Si-Sensortechnologie | |
| Acronym: | SiCer-SST | |
| Duration: | 1st September 2019 - 31st August 2022 | |
| Description: | Highly integrated electronic systems with enhanced sensor functionality can be based on a composite sintered wafer-level substrate consisting of silicon and a multilayer ceramic (SiCer). The subproject focuses on the research of Si processes and processes of AVT. The main focus is on the development and qualification of SiCer-compatible RIE/DRIE structuring processes and the development of wafer-level soldering and bonding processes, separation technologies and packaging processes, including qualification by aging and reliability tests. | |
| Funded by: | BMBF |  |
| Project sponsor: | Projektträger Jülich | |
| Funding code: | 03WKDG018 | |
News articles about SiCer-SST: | ||
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First Status Workshop of the BMBF Growth Core HIPS 25. March 2021 |
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SiCer technology for high performance sensor systems 24. November 2020 |
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